View MB88101A_281368.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

FUJITSU SEMICONDUCTOR DATA SHEET
DS04-13105-2E
Linear IC Converter
CMOS
A/D Converter
(With 4-channel Input at 12-bit Resolution)
MB88101A
s DESCRIPTION
The MB88101A is an analog-to-digital converter that converts its analog input to a 12-bit digital value and outputs it as serial data. The MB88101A employs a successive approximation method for A/D conversion. The MB88101A has four input channels selectable for analog input under control of the dedicated external pins. The MB88101A can be switched to a mode for continuous A/D conversion, in which it outputs serial data from the MSB or LSB selectable depending on the mode setting.
s FEATURES
* * * * * * * * * 4-channel analog input One analog input channel selectable for conversion by external control CR-type successive approximation system with a sample-and-hole circuit 12-bit resolution Serial output of 12-bit digital data Capable of continuous conversion (continuous conversion mode) MSB or LSB selectable for serial output CMOS process Package options of 16-pin DIP, SSOP, and SOP available
s PACKAGES
16-pin Plastic DIP 16-pin Plastic SSOP 16-pin Plastic SOP
(DIP-16P-M04)
(FPT-16P-M05)
(FPT-16P-M06)
MB88101A
s PIN ASSIGNMENT
(TOP VIEW)
AN0 AN1 VREF AGND AN2 AN3 MOD0 MOD1
1 2 3 4 5 6 7 8 INDEX
16 15 14 13 12 11 10 9
V CC SAMP
DO CLK CS C0 C1 DGND
(DIP-16P-M04) (FPT-16P-M06) (FPT-16P-M05)
2
MB88101A
s PIN DESCRIPTION
Pin no. 1 2 5 6 14 13 12 Symbol AN0 AN1 AN2 AN3 DO CLK CS I/O I Descriptions Analog input pins. One of these channels can be selected depending on the C0 and C1 settings.
O I I
This pin outputs the result of A/D conversion. The result is 12-bit serial data output in synchronization with the rise of CLK. Clock input pin for A/D conversion Chip select signal input pin. Setting the signal level to "L" after turning the power on starts A/D conversion; setting it to "H" stops A/D conversion. When this pin is "H", the DO and SAMP pins are "Hi-z". Input pins for selecting the analog input channels from among pins AN0 to AN3. See Table 1 for the correspondence between the pin settings and the channels selected. To switch the channel in mode 2 or 3, set these pins before the SAMP pin goes "H". Conversion mode setting pins. For the correspondence between the pin settings and the modes selected, see Table 2 and "s FUNCTIONAL DESCRIPTION." This pin becomes active in prior to data output. Serial data is output from the DO pin three clock cycles after the signal level at this pin goes "L" after "H" for one clock cycle. Reference voltage input pin Analog circuit ground pin Digital circuit ground pin Power supply pin * Mode selection Table 2 MOD 0 L L H H Pin Settings and Mode Selection MOD1 L H L H Mode Mode 1 Mode 2 (Disabled) Mode 3
11 10
C0 C1
I
7 8 15
MOD0 MOD1 SAMP
I
O
3 4 9 16 * Channel selection Table 1 C1 L L H H
VREF AGND DGND VCC
-- -- -- --
Pin Settings and Channel Selection C0 L H L H Channel AN0 AN1 AN2 AN3
3
MB88101A
s BLOCK DIAGRAM
V REF
12-bit D/A converter
AN 0 Input circuit AN 1 AN 2 AN 3
SAMP
Successive approximation register
Selecter
DO
Comparator
12-bit latch
C0 C1 Sample-and-hold circuit Decoder MOD0 MOD1
V CC A GND D GND
CS
CLK
4
MB88101A
s FUNCTIONAL DESCRIPTION
1. Mode 1
This mode sets the DO pin to "L" and stops conversion upon completion of conversion of 12 bits. To restart conversion, set CS to "H" once then to "L". In this mode, converted data is output from the MSB. * Timing diagram
CS
MOD0, 1 C0, C1 CLK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2
Sampling Bit Trial DO SAMP Hi-z
B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
Sampling B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 Hi-z Hi-z
Hi-z
2. Mode 2
This mode continues conversion until CS becomes "H" after it becomes "L". Converted data is output from the LSB, with the first piece of converted data output 20 clock cycles after CS becomes "L". Changing the channel select pin settings before starting sampling of one analog input allows another to be converted. * Timing diagram
CS
MOD0, 1
Mode 2 AN0 AN2 AN1
C0, C1 CLK
16CLK Bit Trial DO Hi-z SAMP MSB (AN0) LSB Hi-z MSB (AN2) LSB LSB (AN0) MSB MSB (AN1) LSB LSB (AN2) MSB Hi-z Hi-z
5
MB88101A
3. Mode 3
This mode continues conversion until CS becomes "H" after it becomes "L". Converted data is output from the MSB. Changing the channel select pin settings before starting sampling of one analog input allows another to be converted. * Timing diagram
CS
MOD0, 1 C0, C1 CLK Bit Trial Hi-z DO Hi-z SAMP
Mode 3 AN0 AN2 AN1
MSB (AN0) LSB MSB (AN0) LSB
MSB (AN2) LSB MSB (AN2) LSB
MSB (AN1) LSB MSB (AN1) LSB Hi-z Hi-z
6
MB88101A
s ABSOLUTE MAXIMUM RATINGS
Parameter Power supply voltage Input voltage Output voltage Power consumption Operating temperature Storage temperature * : VCC VREF WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. Symbol VCC VREF VIN VOUT PD Ta Tstg -- -- -- Based on GND (Ta = +25C) Conditions Rating Min. -0.3 -0.3* -0.3 -0.3 -- -20 -55 Max. +7.0 +7.0* VCC + 0.3 VCC + 0.3 150 +85 +150 Unit V V V V mW C C
s RECOMMENDED OPERATING CONDITIONS
Parameter Power supply voltage Operation temperature Symbol VCC GND Ta Value Min. 3.3 -- -20 Typ. -- 0 -- Max. 5.5 -- +85 Unit V V C
WARNING: Recommended operating conditions are normal operating ranges for the semiconductor device. All the device's electrical characteristics are warranted when operated within these ranges. Always use semiconductor devices within the recommended operating conditions. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representative beforehand.
7
MB88101A
s ELECTRICAL CHARACTERISTIC
1. DC Characteristics
(1) Digital section (VCC = 3.3 V to 5.5 V, DGND = 0 V, Ta = -20C to +85C) Parameter Power supply voltage Power supply current Input leakage current Low-level input voltage High-level input voltage High-impedance output leakage current Low-level output voltage High-level output voltage Symbol VCC ICC IILK VIL VIH IOLZ VOL VOH DO SAMP VCC Pin name Conditions -- Operation at CLK =166kHz (with no load) VIN = 0 to VCC -- -- VIN = 0 to VCC IOL = 2.5 mA IOH = -400 A Value Min. 3.3 -- -10 VSS - 0.3 0.8 VCC -10 -- VCC - 0.4 Typ. 5.0 0.8 -- -- -- -- -- -- Max. 5.5 2.0 10 0.2 VCC VCC + 0.3 10 0.4 -- Unit V mA A V V A V V
MOD0, 1 CLK CS C0 C1
(2) Analog section (VREF, VCC = 3.3 V to 5.5 V (VCC VREF), AGND = 0 V, Ta = -20C to +85C) Parameter Resolution Linearity error Differential linearity error Conversion time Consumption current Analog reference voltage Analog input voltage Symbol -- -- -- -- IREF -- -- VREF AN0 to AN3 -- AN0 to AN3 Pin name Value Min. -- -4.0 -1.0 -- -- 3.3 0 Typ. 12 -- -- 16 100 5.0 -- Max. -- 2.0 3.0 -- 300 VCC VREF Unit bits LSB LSB CLK A V V
8
MB88101A
(3) Definitions of A/D converter terms * Resolution Analog transition identifiable by the A/D converter * Linearity error Deviation of the straight line drawn between the zero transition point (0000 0000 0000 0000 0000 0001) and the full-scale transition point (1111 1111 1110 1111 1111 1111) of the device from actual conversion characteristics * Differential linearity error Deviation from the ideal input voltage required to shift output code by one LSB
Digital output 1111 1111 1111 1111 1111 1110
* * * * * * * * *
Actual converted value
(1 LSB x N + VOT)
Ideal converted value
Linearity error
0000 0000 0010 0000 0000 0001 0000 0000 0000 VOT
*
Analog output VNT V(N+1)T VFST - VOT 4094 VNT - (1 LSB x N + VOT) 1 LSB V(N+1)T - VNT 1 LSB VFST
1 LSB Linearity error
= =
*
(LSB) (LSB)
*
Differential linearity error =
-1
* Analog input equivalent circuit
Analog input Comparator R ON1 R ON2 C0
RON1 = About 1.5 k RON2 = About 1.5 k C0 = About 60 pF
Note: The above values are reference values.
Notes: * The tolerance of output impedance of an external circuit connected to this A/D converter has an effect on conversion time (CLK frequency). See "s TYPICAL CHARACTERISTICS". * If the output impedance of the external input is too high, the analog voltage sampling time may be short. * When turning the device on, turn the power supply for the digital system first before turning VREF on. 9
MB88101A
2. AC Characteristics
(VREF, VCC = 3.3 V to +5.5 V (VCC VREF), AGND = 0 V, Ta = -20C to +85C) Parameter Clock cycle time Low-level clock pulse width High-level clock pulse width Clock rise time Clock fall time CS setup time CS hold time CS release time Channel setup time Channel hold time Data output delay time MOD setup time MOD hold time Data active delay time Data float delay time SAMP active delay time SAMP float delay time SAMP high-level output delay time SAMP low-level output delay time Symbol tCLK tCKL tCKH tCr tCf tCSS tCSH tCSR tCHS tCHH tDO tMOS tMOH tDVE tDZE tSVE tSZE tSHD tSLD Conditions VCC = 5 V 10% *1 -- -- -- -- -- -- -- -- -- *2 -- -- -- -- -- -- *2 *2 Value Min. 1.0 6.0 2.8 2.8 -- tCKL + 0.4 1.0 1.0 0 1.0 -- 0.2 0.1 -- -- -- -- -- -- Max. 30.0 30.0 14.8 14.8 0.2 -- -- -- -- -- 0.5 -- -- 0.5 0.5 0.5 0.5 0.5 0.5 Unit s s s s s s s CLK s CLK s s s s s s s s s
*1: Depending on the output impedance of the external circuit connected to the analog input pin *2: See "* AC test circuit." * AC test circuit
Measurement point
C L = 50 pF
10
MB88101A
s TIMING DIAGRAM
(1) Input clock timing
t CLK t CKH
CLK
t Cf t CKL t Cr
Evaluation levels are 80% and 20% of the VCC.
(2) A/D startup timing
CLK tCSS CS tCSH
tMOS
tMOH
MOD0, 1 tCHS C0, C1 tSVE Hi-z tSHD tSLD tCHH
SAMP
tDVE Hi-z DO
11
MB88101A
(3) Data output delay time and A/D stop timing
CLK
tCSR
CS
tSZE Hi-z
SAMP tDO tDZE Hi-z DO
12
MB88101A
s TYPICAL CHARACTERISTICS
Power supply voltage vs. Power supply current
1,000 900 800 700 600 500 400 300 200 100 0 Power supply current ICC (A)
Ta = +25C VREF = VCC
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Power supply voltage VCC (V)
Analog reference voltage vs. Analog consumption current
Analog consumption current IREF (A) 300 250 200 150 100 50 Ta = +25C VCC = VREF
0
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Analog reference voltage VREF (V)
13
MB88101A
Analog input external impedance vs. Clock cycle time (tCLK)
10 Ta = +25C 9 8 Clock cycle time tCLK (s) 7 6 5 4 3 2 1 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 V CC = V REF = 3.3 V V CC = V REF = 5.0 V 0 32 64 96 128 Conversion time (s) 160
Analog input impedance (k) Conversion time = Clock cycle time (tCLK) x 16
14
MB88101A
s ORDERING INFORMATION
Part number MB88101AP MB88101APFV MB88101APF Package 16-pin Plastic DIP (DIP-16P-M04) 16-pin Plastic SSOP (FPT-16P-M05) 16-pin Plastic SOP (FPT-16P-M06) Remarks
15
MB88101A
s PACKAGE DIMENSIONS
16-pin Plastic DIP (DIP-16P-M04)
19.55 -0.30 .770 -.012
+.008 +0.20
INDEX-1 INDEX-2 6.200.25 (.244.010)
4.36(.172)MAX
0.51(.020)MIN 0.250.05 (.010.002)
3.00(.118)MIN
0.460.08 (.018.003)
+0.30 +.012 +0.30 +.012
0.99 -0 1.27(.050) MAX
1.52 -0
.039 -0
.060 -0 2.54(.100) TYP
7.62(.300) TYP
15MAX
C
1994 FUJITSU LIMITED D16033S-2C-3
Dimensions in mm (inches) *: This dimension do not include resin protrusion.
1.25 -0.10 +.008 .049 -.004
+0.20
16-pin Plastic SSOP (FPT-16P-M05)
* 5.000.10(.197.004)
(Mounting height)
0.10(.004)
INDEX
*4.400.10
(.173.004)
6.400.20 (.252.008)
5.40(.213) NOM
0.650.12 (.0256.0047)
0.22 -0.05 +.004 .009 -.002
+0.10
"A"
0.15 -0.02 +.002 .006 -.001
+0.05
Details of "A" part 0.100.10(.004.004) (STAND OFF)
4.55(.179)REF
0
10
0.500.20 (.020.008)
C
1994 FUJITSU LIMITED F16013S-2C-4
Dimensions in mm (inches)
16
MB88101A
16-pin Plastic SOP (FPT-16P-M06)
2.25(.089)MAX 10.15 -0.20 .400 -.008
+0.25 +.010
(Mounting height)
0.05(.002)MIN (STAND OFF)
INDEX
5.300.30 (.209.012) "B"
7.800.40 (.307.016)
6.80 -0.20 +.016 .268 -.008
+0.40
1.27(.050) TYP
0.450.10 (.018.004)
O0.13(.005)
M
0.15 -0.02 +.002 .006 -.001 Details of "A" part 0.40(.016)
+0.05
0.500.20 (.020.008)
Details of "B" part 0.15(.006) 0.20(.008)
"A" 0.10(.004) 8.89(.350)REF
0.20(.008) 0.18(.007)MAX 0.68(.027)MAX 0.18(.007)MAX 0.68(.027)MAX
C
1994 FUJITSU LIMITED F16015S-2C-4
Dimensions in mm (inches)
17
MB88101A
FUJITSU LIMITED
All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that Fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan.
F9802 (c) FUJITSU LIMITED Printed in Japan

▲Up To Search▲

Price & Availability of MB88101A

	To Download MB88101A Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .